|

EDSSC 2011 is the 7th in a series of very successful
conferences initiated by IEEE EDSSC joint Chapter. After its great success
in Hong Kong in 2010, EDSSC comes to Tianjin
this year for the first time. EDSSC 2011 is a two-day program comprising
broad areas in electron devices and solid-state circuits.
Conference Location:Start Epoch Hotel.No.276 An Shan Xi Dao,NanKai Zone,Tianjin City.
(more location details:including Chinese Name that can be handled by taxi drivers)
Two Days Program
Conference
Updates:
·
Full-length paper & IEEE
copyright form submission deadline:
October 16, 2011
·
Important notice: the
submitted final paper (all REGULAR papers) must be TWO-PAGE
·
TWO-PAGE full-length paper
(need to be IEEE Xplore
compatible PDF file)
& IEEE copyright form
submission
guidelines available:
Full-length
Paper Submission
·
Hotel and registration information: Conference
Registration
·
Conference program information: Conference
Program
·
JCSC special issue paper submission guidelines:
JCSC submission guideline
·
April 25, 2011: EDSSC2011 online
paper submission & review available.
·
March 15, 2011: EDSSC2011 First
Call-For-Papers available on line
·
March 14, 2011: EDSSC2011
Conference website available on line
·
February 10, 2011: First Call For
Papers released
Important
Dates:
·
Full-length paper submission deadline,
October 16, 2011
·
Join us for the conference, November 17-18, 2011, Thursday-Friday
 
Conference Venue: Tianjin, P.R. China
Invited
Talks/Speakers:
1.
Keynote talk, TBA, Dennis
Buss, Chief Scientist, Texas
Instruments, IEEE Fellow.
2.
Keynote talk, “The Perfect Semiconductor High-Power
Switch for 21st Century Energy Economy,” Krishna Shenai, University of Toledo,
IEEE Fellow.
3.
Keynote talk, Robert
Trew, North Carolina State
University, IEEE Fellow.
4.
“A Two-dimensional Short-Channel Model for
Threshold Voltage of Tri-Gate (TG) MOSFETs with Localized Trapped
Charges,” T. K. Chiang, National University of Kaohsiung.
5.
“ESD-Aware Circuit Design in CMOS Integrated
Circuits to Meet System-Level ESD Specification in Microelectronic
Systems,” Ming-Dou Ker, National Chiao-Tung
University, IEEE
Fellow.
6.
“Compact Modeling of Interconnect
Reliability,” Siegfried
Selberherr, Institut für Mikroelektronik.
7.
“Effective Index for Maintenance scheduling of
Reactive Ion Etching Chamber under Mixture of Recipes – a build-in
reliability approach for wafer fabrication,” Cher Ming Tan, Nanyang
Technological University.
8.
"Nanoscale
Silicon Ion-Sensitive Field-Effect Transistors for pH Sensor and Biosensor
Applications,"
Jeong-Soo Lee, Pohang University
of Science and Technology.
9.
Wonyoung Jung, Vice President, Dongbu Semiconductor.
10.
J. J. Hajjar, Director, ESD Corporate Group, Analog Devices.
11.
Ekachai Leelarasmee, Chulalongkorn University.
12.
“A Fully Integrated 0.18 μm SiGe BiCMOS Low
Power 60 GHz Receiver & Transmitter for High Data Rate Wireless
Communications,” Kiat Seng Yeo, Nanyang Technological University.
13.
“60 GHz Direct
Conversion CMOS Transceiver Design,” Akira Matsuzawa, Tokyo
Institute of Technology, IEEE Fellow.
14.
“Vertical
Integration of Light-emitting Diode Chips,” H. W. Choi, The
University of Hong Kong.
15.
“Wireless
Inter-chip Interconnects,” Takamaro
Kikkawa, Hiroshima University,
IEEE Fellow.
16."A 14-bit
200-MS/s Time-Interleaved ADC Calibrated with LMS-FIR and Interpolation
Filter," Junyan Ren, Fudan University.
More invited speakers
will be announced soon…
|